1. Field of the Invention
The present invention relates to a ferroelectric memory, and more particularly, to a nonvolatile ferroelectric memory which has a simple circuit and a fast access time and allows a non-destructive read mode; and a circuit for controlling the same.
2. Discussion of the Related Art
In general, in writing a data on the nonvolatile ferroelectric memory, voltages of opposite polarities should be applied to a bitline and a bitbarline, which are opposite terminals of a ferroelectric capacitor in the nonvolatile ferruelectric memory, and in reading the data stored in the nonvolatile ferroelectric memory, specific voltages should be applied to opposite terminals of the ferroelectric capacitor, for detecting inversion of a polarity of the ferroelectric capacitor. In this instance, since the stored data is erased, the data should be written in the ferroelectric capacitor, again.
The aforementioned nonvolatile ferroelectric memory will be explained with reference to the attached drawings. FIG. I illustrates a circuit of a background art nonvolatile ferroelectric memory, FIGS. 2a and 2b illustrate schematically explain data storages in a background art ferroelectric memory, and FIG. 3 illustrates a hystereris loop showing voltage vs. polarity.
Referring to FIG. 1, the background art nonvolatile ferroelectric memory is provided with a wordline W/L, a bitline BIT and a bitbarline BITB, a ferroelectric capacitor 1 for storing a data, a first transistor 2 for switching between one side of two sides of the ferroelectric capacitor 1 and the bitline BIT in response to a control signal from the wordline W/L, and a second transistor 3 for switching between the other side of the ferroelectric capacitor 1 and the bitbarline BITB in response to a control signal from the wordline W/L. The first, and second transistors 2 and 3 have source and drain electrodes respectively connected to the bitline(or bitbarline) and the capacitor 1 and gate electrodes connected to the wordlines W/L.
The operation of the background art nonvolatile ferroelectric memory will be explained.
First, data writing will be explained. Upon application of a "high" signal to the wordline W/L on a cell selected to write a data, the first and second transistors 2 and 3 are turned on. And, when voltages of opposite polarities are applied to the bitline BIT and the bitbarline BITB, opposite terminals of the ferroelectric capacitor 1, a ferroelectric material becomes to have a particular polarity. Having a particular polarity thus is having the data written. That is, as shown in FIGS. 2a and 2b, a ferroelectric film 25 between two electrodes 24 and 26 forms the capacitor. As shown in FIG. 2a, when the first electrode BIT 24 is applied of a 5V and the second electrode BITB 26 is applied of 0V, the first electrode 24 has a positive polarity and the second electrode has a negative polarity. And, the ferroelectric film 25 has polarities opposite to the first, and second electrodes 24 and 26 at surfaces facing the first, and second electrodes 24 and 26. Opposite to this, as shown in FIG. 2b, when the first electrode BIT 24 is applied of a 0V and the second electrode BITB 26 is applied of 5V, the first electrode 24 has a negative polarity and the second electrode has a positive polarity. And, the ferroelectric film 25 has polarities opposite to the first, and second electrodes 24 and 26 at surfaces facing the first, and second electrodes 24 and 26. The polarities of the ferroelectric film 26 are remained even after the voltages are cut off, storing a data.
Next, data reading will be explained. Upon application of particular voltages to the opposite terminals of the ferroelectric capacitor 1 for reading the data stored therein, polarities of the capacitor 1 may or may not be inverted. As the polarities memorized in the capacitor 1 can be detected by detecting current caused to flow when the polarities are inverted on application of the particular voltages thus, the data can be read. That is, upon application of 5V to the first electrode 24 and 0V to the second electrode 26 when the ferroelectric film 25 has polarities as shown in FIG. 2a, as can be known from the hysteresis loop shown in FIG. 3, a polarity difference of .DELTA.P1 is occurred. And, upon application of 0V to the first electrode 24 and 5V to the second electrode 26 when the ferroelectric film 25 has polarities as shown in FIG. 2a, as can be known from the hysteresis loop shown in FIG. 3, a polarity difference of .DELTA.P2 is occurred, with polarities of the ferroelectric film as shown in FIG. 2b. Thus, the data is read. However, as the polarities of the ferroelectric film 25 is inverted for reading the data, the data should be re-written thereon so that the capacitor 1 to have original polarities after the reading.
However, the aforementioned background art nonvolatile ferroelectric memory has the following problems.
First, as the capacitor is operative in a destructive mode in reading a data stored in the ferroelectric capacitor, the background art nonvolatile ferroelectric memory is vulnerable to a ferroelectric material fatigue.
Second, since an original data should be re-written without fail after reading the data stored in the capacitor, control becomes complicated and an access time is delayed.